Si4322
Extended Features Command:
bit
15
1
14
0
13
1
12
1
11
0
10
0
9
0
8
0
7
exlp
6
ctls
5
0
4
dcal
3
bw1
2
bw0
1
f5
0
f4
POR
B0CAh
Bit 7 < exlp >:
Bit 6 < ctls >:
Bit 4 < dcal >:
Enables low power mode for the crystal oscillator.
Clock tail selection bit. Setting this bit selects 512 bit long clock tail instead of the default 128 bit length.
Disables the wake-up timer autocalibration.
Bit 3-2 < bw1:bw0 >: Select the bandwidth of the PLL.
bw1
0
0
1
1
bw0
0
1
0
1
PLL bandwidth
15 kHz
30 kHz
60 kHz
120 kHz
Bit 1-0 < f5:f4 >:
Upper two bits for selecting the 48 bit FIFO IT level together with the f3-f0 bits in the Output and FIFO Mode
Command.
15
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